Cadence Design Systems, Inc. (Nasdaq: CDNS) today announced that Samsung Foundry has successfully deployed the Cadence® Tempus™ Timing Signoff Solution featuring a new SPICE-accurate aging analysis capability to advance automotive, aerospace, consumer, mobile and hyperscale design. Prior methods of aging analysis were manual, costly and negatively impacted power, performance and area (PPA). By utilizing the Tempus solution with SPICE-accurate aging analysis, Samsung confidently validated a design with over 10 years of reliability while simultaneously improving timing slack by up to 10% of the clock period versus prior methods, allowing substantial PPA gains. For more information on the Tempus solution with SPICE-accurate aging analysis, please visit www.cadence.com/go/tempusagingpr.
Device performance can degrade over time due to several physical phenomena that impact reliability such as bias temperate instability (BTI) recovery and hot carrier injection (HCI). Technology scaling makes the problem even worse, and the timing impact becomes a first-order effect for high-performance designs that must withstand use over 10 or more years. The Tempus solution provided Samsung Foundry with best-in-class accuracy versus SPICE, while Cadence’s Liberate™ Characterization took stress parameters into account, reducing the burden on standard cell characterization cycles.
“High-reliability devices demand functional safety and component reliability over long operational lifetimes,” said Sangyun Kim, vice president, at Samsung Electronics. “To address this challenge, Samsung and Cadence collaborated to determine how to accurately model component delay performance over time. The collaboration ensured that our aging models, including our Unified Reliability Interface (URI) model, were effectively used with the Liberate Characterization and the Tempus solution’s SPICE-accurate aging analysis capability, producing signoff-accurate results over a range of stress conditions and lifetimes. Due to our successful project with Cadence, we plan to deploy the Tempus solution more widely to create innovative, reliable applications across a wide range of process technologies.”
“Through our collaboration, Samsung achieved exactly what we envisioned with the new Tempus SPICE-accurate aging analysis capability—a highly reliable design with improved PPA,” said Michael Jackson, corporate vice president, R&D in the Digital & Signoff Group at Cadence. “It’s critical that automotive, aerospace and hyperscale designs maintain operational reliability over time, and this cooperation validates that our new approach to aging analysis fulfills customer reliability requirements while simultaneously providing a true competitive advantage in terms of performance.”
The Tempus Timing Signoff Solution with the new SPICE-accurate aging analysis capability is part of the broader digital full flow, providing a fast path to design closure and better predictability. The Tempus solution and the digital full flow support the company’s Intelligent System Design™ strategy delivering SoC design excellence.
About Cadence
Cadence is a pivotal leader in electronic design, building upon more than 30 years of computational software expertise. The company applies its underlying Intelligent System Design strategy to deliver software, hardware and IP that turn design concepts into reality. Cadence customers are the world’s most innovative companies, delivering extraordinary electronic products from chips to boards to systems for the most dynamic market applications, including consumer, hyperscale computing, 5G communications, automotive, mobile, aerospace, industrial and healthcare. For seven years in a row, Fortune magazine has named Cadence one of the 100 Best Companies to Work For. Learn more at cadence.com.
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